menuconfig MTD_SPI_NOR
	tristate "SPI-NOR device support"
	depends on MTD
	help
	  This is the framework for the SPI NOR which can be used by the SPI
	  device drivers and the SPI-NOR device driver.

if MTD_SPI_NOR

config MTD_SPI_NOR_USE_4K_SECTORS
	bool "Use small 4096 B erase sectors"
	default y
	help
	  Many flash memories support erasing small (4096 B) sectors. Depending
	  on the usage this feature may provide performance gain in comparison
	  to erasing whole blocks (32/64 KiB).
	  Changing a small part of the flash's contents is usually faster with
	  small sectors. On the other hand erasing should be faster when using
	  64 KiB block instead of 16 × 4 KiB sectors.

	  Please note that some tools/drivers/filesystems may not work with
	  4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).

config SPI_FSL_QUADSPI
	tristate "Freescale Quad SPI controller"
	depends on ARCH_MXC || COMPILE_TEST
	depends on HAS_IOMEM
	help
	  This enables support for the Quad SPI controller in master mode.
	  This controller does not support generic SPI. It only supports
	  SPI NOR.

config SPI_HISI_SFC
	tristate "Hisilicon SPI-NOR Flash Controller(SFC)"
	depends on ARCH_HISI
	help
	  This enables support for hisilicon SPI-NOR flash controller.

config CLOSE_SPI_8PIN_4IO
	bool "Hisilicon close SPI device Quad SPI mode for some 8PIN chip"
	default y if ARCH_HISI
	help
	  SFC support Quad SPI mode and Quad&addr SPI mode.
	  But some 8PIN chip does not support this mode when HOLD/IO3 PIN was
	  used by reset operation. Usually, your should not config this option.

config HISI_SPI_BLOCK_PROTECT
	bool "Hisilicon Spi Nor Device BP(Block Protect) Support"
	default y if ARCH_HISI
	help
	  HISI SFC supports BP(Block Protect) feature to preestablish a series
	  area to avoid writing and erasing, except to reading. With this macro
	  definition we can get the BP info which was setted before. The
	  BOTTOM/TOP bit is setted to BOTTOM, it means the lock area starts
	  from 0 address.

endif # MTD_SPI_NOR
